1. Field of the Invention
The present invention relates to a voltage boosting/lowering circuit, in particular a voltage boosting/lowering circuit in which switching between a voltage-boosting operation and a voltage-lowering operation is controlled by using a switch(es).
2. Description of Related Art
In digital still camera sets, DC (Direct Current)-DC converters (voltage boosting/lowering circuits), which are superior in terms of the efficiency of electric power, are typically used as power supplies to increase the battery life. Further, when the output voltage accuracy of the power supply is considered to be important, current-mode DC-DC converters are used, rather than voltage-mode DC-DC converters, because they are superior in terms of the transient load response.
In recent years, the desire to increase the precision of the digital still cameras even further has been growing for the purpose of increasing the added value. As a result, it has been desired to increase the accuracy of the output voltage of power supply circuits that are used to supply electrical power to LSLs installed in the digital still cameras. Further, it has been also desired to increase the accuracy of the output voltage of power supply circuits that are used in other sets as in the case of the power supply circuits installed in the digital still cameras.
Japanese Unexamined Patent Application Publication No. 9-9613 (Patent document 1) discloses a configuration of a DC-DC converter for the purpose of supplying a stable output voltage over a wide range of input voltage. The operation of the DC-DC converter disclosed in Patent document 1 is explained hereinafter.
In the DC-DC converter shown in FIG. 4, an input voltage Vi is divided by using resistors 100 and 101, and the measured value of the divided input voltage that appears across the resistor 101 is represented by “Vr101”. A power supply 102 has a voltage-boosting reference voltage Ve1 and a power supply 103 has a voltage-lowering reference voltage Ve2. The voltage-boosting reference voltage Ve1 and the voltage-lowering reference voltage Ve2 have a relation “Ve1<Ve2”. A comparator 104 compares the magnitude of the measured input voltage value Vr101 with the magnitude of the voltage-boosting reference voltage Ve1. Then, when Vr101<Ve1, the comparator 104 brings its output level to “1”, whereas when Vr101>Ve1, the comparator 104 brings its output level to “0”.
During a period in which the On/Off signal is in an On-state, i.e., the output level of the On/Off signal is “1”, when the output level of the comparator 104 is “1”, an AND gate 105 outputs “1”. On the other hand, when the output level of the comparator 104 is “0”, the AND gate 105 outputs “0”. When the output of the AND gate 105 is “1”, the output of an OR gate 106 always becomes “0” irrespective of the output state of an inverter 109, and therefore a transistor 107 always becomes an On-state.
When the output of the AND gate 105 is “0”, the OR gate 106 supplies the output of the inverter 109, without modifying the signal, to the control terminal of the transistor 107. As a result, the transistor 107 performs a switching action in accordance with a PWM (Pulse Width Modulation) signal output by a control unit 108. Meanwhile, a comparator 110 compares the magnitude of the measured input voltage value Vr101 with the magnitude of the voltage-lowering reference voltage Ve2. Then, when Vr101<Ve2, the comparator 110 brings its output level to “0”, whereas when Vr101>Ve2, the comparator 110 brings its output level to “1”.
When the output level of the comparator 110 is “1”, an AND gate 111 outputs “0” irrespective of the output of the control unit 108. As a result, “0” is applied to the control terminal of a transistor 112, and the transistor 112 always becomes an Off-state. When the output level of the comparator 110 is “0”, the AND gate 111 supplies the output of the control unit 108, without modifying the signal, to the control terminal of the transistor 112. As a result, the transistor 112 performs a switching action in accordance with the PWM signal output by the control unit 108.
When Vr101>Ve2, the relation “Vr101>Ve1” is naturally satisfied. Therefore, the transistor 112 is turned off. Further, the transistor 107 performs a switching action in accordance with the PWM signal from the control unit 108. Since the control unit 108 outputs a PWM signal with wide pulse intervals, a voltage-lowering operation is performed. At timing at which the transistor 107 is an Off-state, a flywheel diode 113 operates.
When Vr101<Ve1, the relation “Vr101<Ve2” is naturally satisfied. Therefore, the transistor 107 is turned on. Further, the transistor 112 performs a switching action in accordance with the PWM signal output by the control unit 108. Since the control unit 108 outputs a PWM signal with narrow pulse intervals, a voltage-boosting operation is performed. Further, when Ve2>Vr101>Ve1, both the transistor 107 and the transistor 112 perform switching actions in synchronization in accordance with the PWM signal from the control unit 108. In this case, the operation is a voltage boosting/lowering operation in which the voltage-boosting operation is the base operation. Further, the flywheel diode 113 also operates as described above.